Shanghai, China — Aug.5, 2022 — Brite Semiconductor (“Brite”), a number one customized ASIC & IP supplier, as we speak introduced offering xSPI/HyperbusTM/XcellaTM reminiscence (Flash, PSRAM, MRAM…) controller and PHY resolution for customized SoC. This resolution is verified utilizing reminiscences from reminiscence manufactures resembling GigaDevice, APMemory, Cypress (Infineon), Micron, Macronix and many others., which might assist clients to develop higher merchandise quicker in numerous fields.
The eXpanded Serial Peripheral Interface (xSPI) JESD251 commonplace, ratified by JEDEC in July 2018, defines a high-data throughput, serial interface for reminiscence. It offers excessive knowledge throughput, low pin rely and is primarily to be used in computing, automotive, Web of Issues (IOT), embedded programs and cellular programs, between host processing and peripheral units. The xSPI electrical interface can ship as much as 400MT/s uncooked knowledge throughput. It’s primarily for nonvolatile reminiscence units for instance NOR flash, NAND flash, a lot of reminiscence distributors undertake it for PSRAM (Pseudo SRAM) or MRAM (Magnetic RAM). It’s extensible for a better knowledge price primarily based on both a excessive knowledge price per bit or a wider knowledge path，attaining 800MT/s.
Brite Semiconductor now can present a complete resolution of xSPI controller and PHY for the superior reminiscence and likewise legacy Octal SPI, QSPI and SPI system. We undertake auto-flow-control know-how to attenuate the FIFO/SRAM utilization. Additionally one other revolutionary feedback-sampling know-how is used to extend the info price which doesn’t have a DS, attaining most 400MT/s in 8D mode with out DS. The answer has the next options:
- Assist Flash, PSRAM and MRAM utilizing SPI protocol
- Assist Single/Twin/Quad/Octal SDR/DTR(DDR) SPI
- Assist xSPI/HyperbusTM/XcellaTM specification
- Assist xSPI profile1 and profile2 (HyperbusTM)
- Assist XIP (eXecute-In-Place) for quick boot
- Assist AXI burst sort INCR/WRAP and Fastened (single beat)
- Assist AXI knowledge width 32/64/128… bit
- Assist AXI strobe width 4/8/16… bit
- Assist AXI most burst size 256
- Assist AXI excellent command, configurable excellent functionality
- Assist most 4 CSn
- Assist 3 Bytes or 4 Bytes tackle
- Assist single-ended or differential clock
- Assist with/with out DS, no efficiency degradation with out DS
- Three clock domains: APB, AXI, xSPI clock
- xSPI clock most frequency 200Mhz
- Full digital PHY, 1x clock, small space, over-sampling is pointless
- Most knowledge price 400MT/s (DDR, DTR) or 200MT/s (SDR)
- Assist arbitrary command via APB register interface (READ SFDP, ERASE and many others.)
- Programmable READ/WRITE command code
- Assist 2x dummy cycles (extensible dummy cycles)
Notice: HyperbusTM is a trademark of Cypress(Infineon), XcellaTM is a trademark of Micron.
“There’s a larger demand of excessive throughput and low pin rely for Industrial IoT, Automotive and Edge AI purposes, the emergence of xSPI reminiscence can meet such requirement,” stated Yadong Liu, VP of Engineering at Brite Semiconductor. “As well as, Brite Semiconductor expands the DDR applied sciences to xSPI, adopting auto-flow-control and feedback-sampling applied sciences to attain low space and excessive knowledge price, then offers the full resolution of xSPI reminiscence controller for the customized SoC.”
About Brite Semiconductor
Brite Semiconductor is a number one customized ASIC and IP supplier, and dedicated to offer versatile one-stop providers from structure design to chip supply with excessive worth and differentiated options.
Brite Semiconductor offers complete silicon confirmed “YOU” IP portfolio and YouSiP (Silicon-Platform) resolution, which could be extensively adopted in 5G, AI, excessive efficiency computing, cloud and edge computing, community, IoT, industrial Web and client electronics, and many others. YouSiP resolution offers a prototype design reference for system home and fabless to hurry up the time-to-market.
Based in 2008, Brite Semiconductor is headquartered in Shanghai, China with 5 design and R&D facilities in addition to 4 gross sales places of work in China and the USA.
For extra data, please go to www.britesemi.com