ARM Architecture

Cadence Expands Collaboration with Samsung Foundry to Advance 3D-IC Design

SAN JOSE, Calif.— October 17 2022 — Cadence Design Techniques, Inc. (Nasdaq: CDNS), a collaborative accomplice within the Samsung Superior Foundry Ecosystem (SAFE), at the moment introduced that it has expanded its collaboration with Samsung Foundry to speed up 3D-IC design. Via the continued collaboration, the reference move that includes the Cadence® Integrity 3D-IC platform has been enabled to advance Samsung Foundry’s 3D-IC methodology. Utilizing the Cadence platform, prospects creating advanced, next-generation hyperscale computing, cellular, automotive and AI functions can drastically optimize energy, efficiency and space (PPA) for every die.

The PPA of a design could be impacted when chips are stacked in a 3D-IC configuration versus a 2D configuration as a result of presence of huge 3D buildings like TSVs, which join the stacked chips. Along with blocking commonplace cell placement space, these buildings block routing sources as properly. The Cadence Integrity 3D-IC platform alleviates these conventional challenges, letting customers create a number of TSV insertion situations and devise an optimum 3D construction placement on a die with decreased wirelength penalties whereas boosting PPA and productiveness. The platform additionally lets customers carry out 3D-IC design planning, implementation and signoff from a single cockpit, making the design course of quicker and simpler.

“Prospects creating stacked die designs at superior nodes are at all times trying to make use of the advantages of our applied sciences with out compromising PPA,” mentioned SangYun Kim, vp of the Foundry Design Expertise Crew at Samsung Electronics. “The enablement that resulted from our collaboration with Cadence leverages superior 3D-IC capabilities that present our mutual prospects with progressive strategies to construct 3D designs with out giving up PPA as a result of extra buildings launched with multi-die stacking. After working with Cadence efficiently on the 3D-IC system planning reference move, we’re assured our prospects can obtain their very own distinctive design targets for multi-die stacked designs.”

“Via our newest collaboration with Samsung Foundry, we’re enabling prospects to avoid the standard challenges that come up with 3D-IC design whereas optimizing PPA in parallel,” mentioned Vivek Mishra, company vp of the Digital and Signoff Group at Cadence. “The Integrity 3D-IC platform brings collectively leadingsilicon and bundle implementation with system analysiscapabilities, serving to designers enhance general productiveness. By leveraging Samsung Foundry’s superior 3D-IC capabilities and the Integrity 3D-IC platform, our prospects have entry to an optimum answer for high-quality, multi-die implementation.”

The Integrity 3D-IC platform helps the corporate’s Clever System Design technique, enabling SoC design excellence. For extra info on the Integrity 3D-IC platform, please go to

About Cadence

Cadence is a pivotal chief in digital methods design, constructing upon greater than 30 years of computational software program experience. The corporate applies its underlying Clever System Design technique to ship software program, {hardware} and IP that flip design ideas into actuality. Cadence prospects are the world’s most progressive firms, delivering extraordinary digital merchandise from chips to boards to finish methods for essentially the most dynamic market functions, together with hyperscale computing, 5G communications, automotive, cellular, aerospace, shopper, industrial and healthcare. For eight years in a row, Fortune journal has named Cadence one of many 100 Greatest Corporations to Work For. Study extra at

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