ARM Architecture

eDisplay Port Tx PHY and Controller IP Cores in 12FFC and 40ULP for an immersive UHD expertise at 8K

Dec 26, 2022 — T2M-IP, the worldwide impartial semiconductor IP Cores supplier & Know-how consultants, is happy to announce the speedy availability of its companion’s VESA normal eDisplay Port / Show Port v1.4 Tx PHY IP Cores in 40nm ULP and 12nm FFC matching Controllers that are silicon confirmed in main Fabs with minimal energy utilization and wonderful effectivity for a real UHD expertise.

Show Port 1.4 Tx PHY and Controller IP cores applies a visually lossless compression system with the assistance of DSC (Show Stream Compression) and FEC (Ahead Error Correction) to attain an 8K UHD show at 60Hz. With a transmitter PHY supporting 1.62Gbps (RBR) to eight.1Gbps (HBR3) knowledge charges, T2M-IP’s DisplayPort model 1.4 compliant Core is a strong, but energy-efficient, with programmable analogue options, comparable to inbuilt 100-ohm termination resistors with common-mode biassing and an built-in equalisation with variable power, make it much less energy-intensive.

Greater decision utilising fewer pins is made potential by the packetized knowledge switch of the eDisplay Port/Show Port v1.4 Tx in 12FFC and 40ULP course of applied sciences. The DisplayPort 1.4 normal permits for the transmission of Extremely Excessive Definition (UHD) and Excessive Dynamic Vary (HDR) video streams by way of a single DisplayPort interface for high-end show purposes with 8K decision. It additionally helps HDCP1.4, HDCP2.2, and DSC’s bandwidth discount.

With the additional advantage of backward compatibility, the eDP model 1.4a / DP model 1.4 compliant transmitter permits ahead error correction and has customizable (4/2/1) hyperlink channels. It additionally has one AUX channel. Moreover, it helps all suggested hyperlink charges and bit charges of 1.62/2.7/5.4/8.1Gbps (HBR3). It permits principal hyperlink operation with 1, 2, or 4 lanes, which can deal with the next: SST mode; Regular and Alternate Scrambler Seed Reset; Enhanced and Default Framing Mode. Moreover, our IP Core has Configuration registers that could be programmed utilizing the AMBA interface.

eDisplay Port / Show Port v1.4 Tx Controller and PHY IP cores with a transparent lossless video compression expertise that multiplies the DisplayPort knowledge switch capability and has been utilized in semiconductor business’s computing, digital shows, displays, TVs and different client electronics.

Along with Show Port/eDisplay Port IP Cores, T2M‘s broad silicon Interface IP Core Portfolio consists of USB, HDMI, MIPI (CSI, DSI, UniPro, UFS, Soundwire, I3C), PCIe, DDR, 10/100/1000 Ethernet, V by One, programmable SerDes, Serial ATA and plenty of extra, out there in main Fabs in course of geometries as small as 7nm. They can be ported to different foundries and modern processes nodes on request.

About T2M: T2M-IP is the worldwide impartial semiconductor expertise consultants, supplying advanced semiconductor IP Cores, Software program, KGD and disruptive applied sciences enabling accelerated improvement of your Wearables, IOT, Communications, Storage, Servers, Networking, TV, STB and Satellite tv for pc SoCs. For extra data, please go to:

Availability: These Semiconductor Interface IP Cores can be found for speedy licensing both stand alone or with pre-integrated Controllers and PHYs. For extra data on licensing choices and pricing please drop a request / MailTo

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