November 21, 2022 — T2M-IP, the worldwide impartial semiconductor IP Cores supplier & Know-how specialists, is happy to announce its HDMI 2.0 Rx PHY IP cores, Silicon Confirmed in 12FFC course of know-how together with matching Controller IP Cores out there instantly for licensing. The HDMI 2.0 Rx IP cores offers a best-in-class Receiver functionalities for a lossless show interface in ultra-high-definition multimedia SoCs.
This HDMI 2.0 Rx PHY IP Cores in 12FFC with matching Controller IP cores confirms with HDMI commonplace model 2.0b and presents a full HDMI receiver functionality. It’s made up of two modules: a hyperlink module and a bodily layer (PHY). The hyperlink module is applied as a synthesizable tender IP core, whereas the PHY IP core is totally appropriate with DVI receiver and applied as a tough IP primarily based on 28HPC+ CMOS logic course of. The transmission of audio-visual materials is secured by an built-in HDCP (Excessive-bandwidth Digital Content material Safety) encryption.
Maintaining with the ever-increasing calls for for higher Audio-Video applied sciences, the 12nm FFC know-how of the HDMI 2.0 Rx PHY IP cores has a variety of channel speeds as much as 6.0Gbps. HDMI 2.0 Rx PHY IP cores in 12FFC helps HDCP 2.2/HDCP 1.4 together with CEA-861F/VESA DMT as much as 4K x 2K decision. The layered structure of the PHY allows 3D codecs (Body packing/Facet by Facet Half/Prime & Backside) for a really next-Gen expertise. Embracing a brand new age of Shows the HDMI 2.0 PHY IP cores are additionally capable of assist Deep Shade Mode at 24, 30, and 36 bit per pixel with a programmable coloration area converter that features BT601/709/2020(NonConst)/RGB/xvYCC. Boasting adjustable analog traits, the IP Cores offers entry to I2S, S/PDIF and DSD audios over a 1.8V/0.9V energy provide.
The HDMI 2.0 Rx Controller IP cores present a synthesizable design that’s simply built-in into any SoC and helps quite a lot of host bus interfaces enabling a, good Hyperlink Layer and PHY integration. With a full HDMI sink performance appropriate with DVI and Twin-Hyperlink DVI Requirements, the Hyperlink layer is ready to assist Variable Refresh Charge (VRR), Quick Vactive (FVA), Ahead Error Correction (FEC) and show information channel (DDC) for a clean and efficient sync with the 12FFC course of know-how PHY.
With a number of licenses and mass productions, the HDMI 2.0 Rx PHY IP and Controller IP Cores has been used within the semiconductor business’s Multimedia units corresponding to Televisions, Private Computer systems, Digital Advert Boards, Automotive, and different Client Electronics….
Along with HDMI 2.0 Rx PHY and Controller IP Cores, T2M ‘s broad silicon Interface IP Core Portfolio consists of USB, PCIe, Serial ATA, HDMI, Show Port, MIPI, DDR, programmable SerDes, SD/eMMCs, 1G Ethernet and plenty of extra Controllers with matching PHYs, out there in main Fabs in course of geometries as small as 6nm. They will also be ported to different foundries and modern processes nodes on request…
T2MIP is the worldwide impartial semiconductor know-how specialists, supplying advanced semiconductor IP Cores, Software program, KGD and disruptive applied sciences enabling accelerated improvement of your Wearables, IOT, Communications, Storage, Servers, Networking, TV, STB and Satellite tv for pc SoCs. For extra info, please go to: www.t-2-m.com
These Semiconductor Interface IP Cores can be found for fast licensing both stand alone or with pre-integrated Controllers and PHYs. For extra info on licensing choices and pricing please drop a request / MailTo