ARM Architecture

Modulation Options for the Software program Engineer


Earlier than I get to speaking about modulation, this is a quick diversion.

A very long time in the past — 1993, to be exact — I took my first course on digital electronics and processors. In that class, we had to purchase a replica of the TTL Knowledge Ebook* from Texas Devices.

If in case you have any expertise in digital logic design you most likely know that TTL stands for Transistor-transistor logic (thereby making the phrase “TTL Logic” an instance of RAS syndrome), the primary actually broadly profitable household of digital logic elements, and perhaps you already know that the 7400 sequence of logic chips — not the primary sequence of digital logic chips and even of TTL, however definitely probably the most widespread sequence of logic chips — was first designed by Texas Devices and since then has been broadly second-sourced by many different firms.

What you might not know is that Texas Devices began as an geological providers firm for the oil business (take a look at the TI brand someday: it is an “i” forming a drill descending a “t” formed gap), which morphed right into a producer of built-in circuits within the Nineteen Fifties and Sixties, and that again when the 7400 sequence was launched within the mid-Sixties, the rationale for these chips was not as right now’s “glue logic” to interface extra difficult gadgets, however as an alternative as the fundamental constructing blocks to make computer systems. Earlier than built-in circuits, a pc product of transistors would have to be product of discrete transistors. As soon as customary digital logic ICs had been on the market, as an alternative of getting to make your individual AND gates or flip-flops out of transistors, you possibly can simply purchase them, after which design a pc utilizing boards with row upon row of 7400 logic chips.

Nonetheless appears sort of antiquated, what with right now’s single-chip microcontrollers, however occasions have modified.

Anyway, I purchased my copy of the TTL Knowledge Ebook in 1993, and began looking via it. The guide described the entire sequence of various digital chips within the 7400, 74S00, and 74LS00 households, every thing from the garden-variety gates, flip-flops, multiplexers, counters, and shift registers, to some bizarre little special-purpose chips just like the 4×4 register file (670), the addressable latch (259). And in my digital logic class, we really constructed a rudimentary pc out of nothing however 74LS00 sequence chips and a crystal oscillator and a few SRAM and DRAM chips.

However there was one little oddity that I all the time wished to check out: the 7497 6-bit synchronous charge multiplier. There is not any 74HC97 — it by no means made it to every other logic past the unique 7400 sequence, and by no means acquired produced in any smaller package deal than DIP, however you’ll be able to nonetheless purchase it from TI — kinda expensive although.

What this chip does is soak up a 6-bit binary quantity M and a clock sign, and it produces an output waveform that has M pulses for each 64 pulses of the enter clock, with lacking pulses to fill within the gaps.

If somebody gave you this as an outline, how would you implement it?

Properly, if it had been a 4-bit synchronous charge multiplier (lowered right here for illustration functions) I would most likely use a 4-bit counter after which examine the depend with the quantity M, to multiplex between the enter clock pulse and a relentless logic low (or excessive) to provide the next sample:

M=0:  000000000000000000000000000000000000000000000000

M=1:  100000000000000010000000000000001000000000000000

M=2:  110000000000000011000000000000001100000000000000

M=3:  111000000000000011100000000000001110000000000000

M=14: 111111111111110011111111111111001111111111111100

M=15: 111111111111111011111111111111101111111111111110

the place a “1” represents a pulse and a “0” represents no pulse.

That is an instance of modulation: we take a reference waveform (the enter clock pulse) and switch it on and off relying on some parameter. On this case it is similar to pulse-width modulation (PWM), besides that for PWM a “1” would signify excessive and a “0” low (quite than pulse or no pulse). In any case, you may be aware that the 1’s and 0’s are all clustered collectively.

However with the 7497, TI did one thing completely different. The 1s and 0s are extra equally distributed. (It is simpler to see this from the datasheet of the now-obsolete DM7497 from Nationwide Semiconductor.)

For M=1: (the DM7497 describes the conduct of the inverting output)
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

M=2:
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

M=3:
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

M=4:
1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1

and so forth.

It is a bizarre approach of mixing the enter quantity M and a 6-bit inside counter; check out the datasheet and perhaps you may perceive the way it works. I used to be all the time mystified by it, and puzzled what sort of utility would encourage such an built-in circuit.


Let’s quick ahead from 1993 to right now.

I am {an electrical} engineer engaged on energy and sign processing, and I take advantage of PWM on a regular basis to permit digital logic to provide a sequence of on/off pulses the place the enter responsibility cycle D controls the common fraction of the time a change is turned on. Fixed frequency, variable pulse width.

In software program you possibly can implement this as follows:

int modulation_state = 0;
int PERIOD = 256;
bool PWM(int m)
{
  if (++modulation_state >= PERIOD)
    modulation_state = 0;
  return m > modulation_state;
}

the place PWM() is a perform you name at an everyday charge, and also you get both a TRUE (on) or FALSE (off) output of the PWM.

Simple. (Normally PWM is a {hardware} peripheral that runs on the system clock, however typically you want only one extra PWM output for one thing easy like an LED or a valve, and software program will get caught having to implement it since you run out of {hardware} PWM channels.)

Now suppose we alter the issue. We wish a way of modulating an output on and off in order that its common fraction of on-time matches the enter responsibility cycle, however we do not care that it is fixed frequency. Truly we might just like the frequency to be as quick as doable.

Properly, a method is to emulate the 7497 synchronous charge multiplier — for those who undergo the trouble of translating the AND and OR gates in its output, you possibly can match its conduct with out the pulse-gating, nevertheless it’s sort of ugly for software program to guage, trying one thing like a bunch of bits of a Grey code ANDed along with the low order little bit of M, then OR that with the a subset of Grey code bits ANDED along with the next-to-lowest little bit of M, OR’d with… and so forth. Good for digital logic, cumbersome for software program.

I bumped into this drawback a couple of years in the past whereas speaking with a colleague of mine on the time, Eric Jensen — who has since retired, and a very long time in the past was one of many hackers at MIT who invented all types of intelligent methods to govern bits to perform sure mathematical calculation. Eric launched me to what he referred to as “artificial division”:

int modulation_state = 0;
int q = 256;  // would not must be an influence of two
bool syntheticPWM(int p)
{
  modulation_state += p;
  if (modulation_state < q)
    return false;
  modulation_state -= q;
  return true;
}

This produces a pulse practice with common on-time fraction p/q.

Let’s take a look at a selected instance: p = 3, q = 7. The desk beneath has the primary column containing the modulation state and the second column containing the output.












3 false
6 false
2 true
5 false
1 true
4 false
0 true
3 false
6 false

….

The modulation state increments by p, modulo q, and also you get an output that’s true each time the modulation state wraps round.

The worth of p would not must be fastened however can fluctuate over time, thus various the common output fraction.

It seems that this technique is actually equal to the strategy utilized in first-order delta-sigma modulation, which is broadly used. You’ve got an integrator (equal to the modulation state that provides the worth of p), and a threshold comparator (equal to our evaluating the modulation state with q) that produces an output waveform that’s used to counteract the rise within the integrator, in order that when the common worth of the output state balances the enter state, the integrator stays inside bounds.

Delta-sigma modulation has a number of variants (together with increased order modulators) and in contrast to PWM, is used to provide spread-spectrum quantization noise. When you take a look at the spectrum of a PWM waveform, it exhibits up as harmonics of the PWM service charge, that are undesirable however crucial artifacts of modulation. (Ideally we’d simply output an analog sign at DC with no switching noise — however that is not doable with on/off outputs.) The delta-sigma modulation shifts this noise upwards in spectrum, in order that it is nearer to the modulation frequency, and may be extra simply filtered out.

When would you wish to use PWM as an alternative of delta-sigma? If you want fixed-frequency output and extra frequent switching has unfavourable penalties (e.g. energy electronics the place switching losses are a perform of how usually you flip a change on or off).

When would you wish to use delta-sigma as an alternative of PWM? When you’ve a comparatively gradual modulation charge (e.g. a software program routine that runs at 400Hz) that is gradual sufficient that switching each different modulation interval would not have unfavourable penalties, and you may’t afford to run the modulator quick sufficient to get the decision you need with PWM however not have a really gradual PWM interval.

For instance, for those who wanted 8-bit decision for a software-implemented PWM waveform that runs at 400Hz, that may imply a PWM interval of 640msec (or frequency of 1.5625Hz). Yikes! That is gradual.

In distinction, operating a delta-sigma modulator at 400Hz with an obligation cycle of fifty%, you get an output waveform that is 200Hz (which typically produces very low switching losses in energy electronics; you begin to fear about switching losses in IGBTs at 10-50kHz and in MOSFETs at lots of of kHz). At 25% and 75% responsibility cycle, the output waveform is at 100Hz; at 10% and 90% responsibility cycle, the output waveform is at 40Hz. The nearer you might be to 50%, the nearer the output frequency is to half the modulation charge. The nearer you might be to 0% or 100%, the slower the output frequency.

Completely satisfied modulating!


*p.s. if you would like a replica of the 1988 version of the TI TTL Knowledge Ebook, TI lately began promoting them for 10 cents apiece on their web site. Fairly a couple of of the elements are outdated, and all of the sequence (7400, 74S00, 74LS00) are legacy sequence higher changed by 74HC, 74LVC, and many others., however I nonetheless sometimes browse the yellowed pages of my paper databook to attempt to determine if there is a glue logic chip that may remedy my drawback.

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