ARM Architecture

Synopsys Drives Chip Innovation for Subsequent-Technology Cellular and HPC Designs on TSMC N3E and N4P Processes


Synopsys Digital and Customized Design Flows Licensed for TSMC N3E and N4P Processes and Broad Synopsys IP Portfolio Accessible Now

MOUNTAIN VIEW, Calif., June 13, 2022 — Serving to clients optimize efficiency, energy and space (PPA) for next-generation system-on-chips (SoCs) utilized in demanding cell and high-performance computing purposes, Synopsys, Inc. (Nasdaq: SNPS) right this moment introduced that TSMC has licensed the Synopsys digital and customized design flows for its industry-leading N3E and N4P course of applied sciences. As well as, Synopsys’ main Basis IP and Interface IP can be found now on the TSMC N3E and N4P processes to speed up SoC growth and decrease design danger. Adopted by main clients, the digital and customized design flows and IP are primarily based on the newest variations of TSMC’s design rule guide (DRM) and course of design kits (PDKs).

“TSMC and Synopsys have efficiently collaborated for many years, with the shared aim of serving to our mutual clients meet the aggressive PPA calls for of more and more advanced SoCs,” mentioned Suk Lee, vice chairman of the Design Infrastructure Administration Division at TSMC. “By enabling Synopsys’ design options on TSMC’s high-performing and power-efficient N3E and N4P processes, clients can produce modern, superior chips for a wide range of demanding, compute-intensive purposes.”

Study extra about Synopsys digital and customized flows, in addition to Synopsys Basis IP and Synopsys Interface IP.

The built-in Synopsys Customized Design Household options new improvements in synthesis, place-and-route, bodily verification and timing signoff, which allows the absolute best PPA outcomes and quicker design closure. On the customized aspect, Synopsys Customized Compilerdesign and format product, a part of the Synopsys Customized Design Household and efficiently validated by the Synopsys IP staff, options enhancements that strengthen productiveness for designers utilizing TSMC’s N3E course of. As well as, the Synopsys PrimeSim™ circuit simulation expertise delivers required accuracy for advanced-node designs, offering signoff protection for circuit simulation and reliability necessities.

“Our deep historical past of collaboration with TSMC by way of each course of technology has enabled Synopsys to co-optimize our digital and customized design households and IP portfolio to offer compelling PPA benefits for our mutual clients,” mentioned Sanjay Bali, vice chairman of selling and technique for the Silicon Realization Group at Synopsys. “We’re seeing first-hand how corporations are attaining profitable designs and delivering the following stage of innovation with Synopsys EDA flows and IP on TSMC’s superior N3E and N4P processes.”

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software program accomplice for modern corporations growing the digital merchandise and software program purposes we depend on daily. As an S&P 500 firm, Synopsys has a protracted historical past of being a world chief in digital design automation (EDA) and semiconductor IP and provides the {industry}’s broadest portfolio of utility safety testing instruments and companies. Whether or not you are a system-on-chip (SoC) designer creating superior semiconductors, or a software program developer writing safer, high-quality code, Synopsys has the options wanted to ship modern merchandise. Study extra at https://www.synopsys.com.

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