ARM Architecture

Weighing Chip-Design-Verification Challenges for MedTech


By Bob Smith, ESD Alliance
EETimes (November 23, 2022)

Security and safety are big and sophisticated chip-design-verification challenges to be handled for medical know-how (MedTech) functions. Acknowledging this, Lucio Lanza, managing associate of Lanza techVentures, requested panelists at SEMICON West 2022 this query: How should verification change as MedTech and different new functions retarget current chips in new methods?

Dave Kelf, CEO of Breker Verification Programs, defined verification’s three axes.

The primary is the best way verification is completed with massive chips—a transfer from simulation to leverage totally different applied sciences.

The second is the verification requirement—beforehand useful verification and the ultimate take a look at of the chip. Now it consists of extra necessities, resembling SoC integration, ensuring cache coherence and integration points in addition to challenges, resembling security and safety, are addressed.

The third axis is the variety of totally different functions, he mentioned. It was communications, client, and pc electronics 20 years in the past. Now it’s MedTech, automotive, and different new functions with massive gadgets that must be verified. Security and safety grow to be vital.

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